A Fully Automated SPICE-Compatible Netlist Extraction From Image Using Deep Learning and Image Preprocessing Techniques

dc.contributor.authorPeker, Omer Baran
dc.contributor.authorToker, Emre
dc.contributor.authorOcal, Dogukan
dc.contributor.authorDalyan, Tugba
dc.contributor.authorAfacan, Engin
dc.contributor.authorGokdel, Yigit Daghan
dc.date.accessioned2026-04-04T18:55:50Z
dc.date.available2026-04-04T18:55:50Z
dc.date.issued2026
dc.departmentİstanbul Bilgi Üniversitesi
dc.description.abstractThis paper presents an automated framework for generating SPICE compatible netlists from both printed and hand-drawn circuit diagrams. The system combines advanced image preprocessing, deep learning based object detection, and contour based node analysis to address challenges such as inconsistent drawing styles, illumination variations, and non-standardized symbols. A unified preprocessing module incorporating denoising, contrast enhancement, adaptive thresholding, morphological filtering, and skeletonization ensures robust inputs for downstream tasks. Multiple YOLO (You Only Look Once) architectures were trained and evaluated, demonstrating strong performance across subtasks: YOLOv8L achieved 97.50% for transistor detection, YOLOv11L reached 98.55% for terminal segmentation, YOLOv11X attained 96.13% for voltage segmentation, and YOLOv8L obtained 99.23% for ground detection. These results confirm the framework's reliability in symbol interpretation. Beyond component-level recognition, the system integrates a specialized transistor terminal segmentation model and an advanced contour-based node detection module, enabling the accurate extraction of connectivity, even in dense, multi-component circuits. A novel validation mechanism further enhances robustness by fully automated simulating generated netlists in LTSpice and comparing node voltages with those of reference designs. Experimental evaluation demonstrates superior performance on printed diagrams (93.33% accuracy) and competitive performance on hand-drawn sketches (85.33% accuracy), despite stylistic irregularities. Overall, the proposed pipeline provides a scalable and accurate end-to-end solution, reducing human error and ensuring functional equivalence. Its ability to process complex, large-scale hand-drawn schematics under diverse conditions highlights its contributions to Electronic Design Automation (EDA), industrial applications, and intelligent design assistance. In addition, the framework incorporates a fast and fully automated validation stage, where generated netlists are systematically simulated in LTspice and compared against reference designs. This ensures both structural correctness and functional equivalence, further enhancing robustness and reliability.
dc.description.sponsorshipScientific and Research Council of Turkey (TUBIdot;TAK) [2209-A]
dc.description.sponsorshipThis work was supported in part by the Scientific and Research Council of Turkey (TUB & Idot;TAK) under Grant 2209-A.
dc.identifier.doi10.1109/ACCESS.2026.3656316
dc.identifier.doi10.1109/ACCESS.2026.3656316
dc.identifier.endpage19765
dc.identifier.issn2169-3536
dc.identifier.scopus2-s2.0-105028334025
dc.identifier.scopusqualityQ1
dc.identifier.startpage19750
dc.identifier.urihttps://doi.org/10.1109/ACCESS.2026.3656316
dc.identifier.urihttps://hdl.handle.net/11411/10578
dc.identifier.volume14
dc.identifier.wosWOS:001687406600003
dc.identifier.wosqualityQ2
dc.indekslendigikaynakWeb of Science
dc.indekslendigikaynakScopus
dc.language.isoen
dc.publisherIeee-Inst Electrical Electronics Engineers Inc
dc.relation.ispartofIeee Access
dc.relation.publicationcategoryMakale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanı
dc.rightsinfo:eu-repo/semantics/openAccess
dc.snmzKA_WoS_20260402
dc.snmzKA_Scopus_20260402
dc.subjectAccuracy
dc.subjectIntegrated Circuit Modeling
dc.subjectArtificial Intelligence
dc.subjectFeature Extraction
dc.subjectYolo
dc.subjectDeep Learning
dc.subjectVoltage
dc.subjectPipelines
dc.subjectLighting
dc.subjectData Preprocessing
dc.subjectHand-Drawn
dc.subjectImage Segmentation
dc.subjectNetlist Generation
dc.subjectNode Detection
dc.subjectObject Detection
dc.subjectSpice
dc.subjectValidation
dc.subjectEda
dc.subjectCad
dc.titleA Fully Automated SPICE-Compatible Netlist Extraction From Image Using Deep Learning and Image Preprocessing Techniques
dc.typeArticle

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